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FastLane: Improving Performance of Software Transactional Memory for Low Thread Counts

, , , , and . Proceedings of the 18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, page 113--122. New York, NY, USA, ACM, (2013)
DOI: 10.1145/2442516.2442528

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FastLane: Improving Performance of Software Transactional Memory for Low Thread Counts, , , , and . Proceedings of the 18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, page 113--122. New York, NY, USA, ACM, (2013)FastLane: Software Transactional Memory Optimized for Low Numbers of Threads., , , , and . Software Engineering, volume P-227 of LNI, page 35-36. GI, (2014)The TURBO Diaries: Application-controlled Frequency Scaling Explained., , , , , and . Software Engineering & Management, volume P-239 of LNI, page 141-142. GI, (2015)