( en | de | ru )

 

Disambiguation of "Raghunathan, Anand"

Author of the publication

copydeleteadd this publication to your clipboard
Energy-Efficient Object Detection Using Semantic Decomposition.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (9): 2673-2677 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Davinder Kumar Anand

Raghunathan Ramakrishnan

Devanathan Raghunathan

Amar Frank Anand

Madhankumar Anandhakrishnan

 

Other publications of authors with the same name

Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips., , , and . DAC, page 513-518. ACM, (2000)Hardware Accelerated Power Estimation, , and . CoRR, (2007)STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks., , , and . CoRR, (2014)Analyzing the energy consumption of security protocols., , , and . ISLPED, page 30-35. ACM, (2003)System-on-Chip Power Management Considering Leakage Power Variations., , , and . DAC, page 877-882. IEEE, (2007)Software Architectural Transformations, , and . (2004)Input Compression with Positional Consistency for Efficient Training and Inference of Transformer Neural Networks., and . CoRR, (2023)Yield, Area, and Energy Optimization in STT-MRAMs Using Failure-Aware ECC., , , and . ACM J. Emerg. Technol. Comput. Syst., 13 (2): 20:1-20:20 (2016)Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage., , , and . ACM J. Emerg. Technol. Comput. Syst., 12 (1): 4:1-4:27 (2015)Ax-BxP: Approximate Blocked Computation for Precision-reconfigurable Deep Neural Network Acceleration., , and . ACM Trans. Design Autom. Electr. Syst., 27 (3): 28:1-28:20 (2022)