Author of the publication

temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing.

S. Clerc, M. Saligane, F. Abouzeid, M. Cochet, J. Daveau, C. Bottoni, D. Bol, J. Vos, D. Zamora, B. Coeffic, D. Soussan, D. Croain, M. Naceur, P. Schamberger, P. Roche, and D. Sylvester. ISSCC, page 1-3. IEEE, (2015)

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Malika Mehdi

Ahmad Mehdizadeh

Majid Mehdikhani

Arash Mehdiani

Syed Atif Mehdi

Other publications of authors with the same name

17.3 A reconfigurable dual-port memory with error detection and correction in 28nm FDSOI.M. Khayatzadeh, M. Saligane, J. Wang, M. Alioto, D. Blaauw, and D. Sylvester. ISSCC, page 310-312. IEEE, (2016)A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation.J. Lee, S. Miyoshi, M. Kawaminami, D. Blaauw, D. Sylvester, Y. Zhang, Q. Dong, W. Lim, M. Saligane, Y. Kim and 3 other author(s). IEEE J. Solid State Circuits, 55 (1): 87-97 (2020)An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration.M. Saligane, J. Lee, Q. Dong, M. Yasuda, K. Kumeno, F. Ohno, S. Miyoshi, M. Kawaminami, D. Blaauw, and D. Sylvester. VLSI Circuits, page 63-64. IEEE, (2018)All-digital SoC thermal sensor using on-chip high order temperature curvature correction.M. Saligane, M. Khayatzadeh, Y. Zhang, S. Jeong, D. Blaauw, and D. Sylvester. CICC, page 1-4. IEEE, (2015)Quantum Circuit Simulation with Fast Tensor Decision Diagram.Q. Zhang, M. Saligane, H. Kim, D. Blaauw, G. Tzimpragos, and D. Sylvester. CoRR, (2024)The Missing Pieces of Open Design Enablement: A Recent History of Google Efforts : lnvited Paper.T. Ansell, and M. Saligane. ICCAD, page 112:1-112:8. IEEE, (2020)A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation.J. Lee, Y. Zhang, Q. Dong, W. Lim, M. Saligane, Y. Kim, S. Jeong, J. Lim, M. Yasuda, S. Miyoshi and 3 other author(s). ISSCC, page 314-315. IEEE, (2019)A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin.Q. Dong, S. Jeloka, M. Saligane, Y. Kim, M. Kawaminami, A. Harada, S. Miyoshi, M. Yasuda, D. Blaauw, and D. Sylvester. IEEE J. Solid State Circuits, 53 (4): 1006-1015 (2018)ConSmax: Hardware-Friendly Alternative Softmax with Learnable Parameters.S. Liu, G. Tao, Y. Zou, D. Chow, Z. Fan, K. Lei, B. Pan, D. Sylvester, G. Kielian, and M. Saligane. CoRR, (2024)Bridging Academic Open-Source EDA to Real-World Usability.A. Rovinski, T. Ajayi, M. Kim, G. Wang, and M. Saligane. ICCAD, page 111:1-111:7. IEEE, (2020)

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Disambiguation of "Saligane, Mehdi"