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An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices.

, , , , , , and . MEMSYS, page 114-125. ACM, (2020)

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Improving the error behavior of DRAM by exploiting its Z-channel property., , , , , and . DATE, page 1492-1495. IEEE, (2018)Advanced heterogeneous memory subsystems for energy-constrained computing = Fortgeschrittene heterogene Speichersubsysteme für Computersysteme mit limitiertem Energieverbrauch.. Kaiserslautern University of Technology, Germany, (2021)A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing., , , , , and . SAMOS, volume 11733 of Lecture Notes in Computer Science, page 429-441. Springer, (2019)RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM., , , , , , , and . SAMOS, volume 11733 of Lecture Notes in Computer Science, page 34-47. Springer, (2019)CAPE - European Open Compute Architecture for Powerful Edge., , , , , , , , , and 18 other author(s). DSD, page 130-137. IEEE, (2025)An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices., , , , , , and . MEMSYS, page 114-125. ACM, (2020)An analysis on retention error behavior and power consumption of recent DDR4 DRAMs., , , , , , and . DATE, page 293-296. IEEE, (2018)Efficient coding scheme for DDR4 memory subsystems., , , , , , and . MEMSYS, page 148-157. ACM, (2018)