( en | de | ru )

 

Disambiguation of "Watkins, Matthew A."

Author of the publication

copydeleteadd this publication to your clipboard
Characterization of GPGPU workloads on a multidimensional heterogeneous processor.

, and . ISPASS, page 121-122. IEEE Computer Society, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Charles Watkins

Charles Watkins

Andrew Watkins

Charles H Watkins

Matthew Mellon

 

Other publications of authors with the same name

On-Chip Optical Technology in Future Bus-Based Multicore Designs., , , , , , and . IEEE Micro, 27 (1): 56-66 (2007)Leveraging Optical Technology in Future Bus-based Chip Multiprocessors., , , , , , and . MICRO, page 492-503. IEEE Computer Society, (2006)ReMAP: A Reconfigurable Heterogeneous Multicore Architecture., and . MICRO, page 497-508. IEEE Computer Society, (2010)Dynamically managed multithreaded reconfigurable architectures for chip multiprocessors., and . PACT, page 41-52. ACM, (2010)A Phase-Adaptive Approach to Increasing Cache Performance., , and . PACT, page 432. IEEE Computer Society, (2007)ReMAP: A Reconfigurable Architecture for Chip Multiprocessors., and . IEEE Micro, 31 (1): 65-77 (2011)Revisiting Cache Block Superloading., , and . HiPEAC, volume 5409 of Lecture Notes in Computer Science, page 339-354. Springer, (2009)Software transparent dynamic binary translation for coarse-grain reconfigurable architectures., , and . HPCA, page 138-150. IEEE Computer Society, (2016)Characterizing a Commercial Multidimensional Heterogeneous Processor Under GPGPU Workloads., and . ISPASS, page 229-239. IEEE Computer Society, (2018)Characterization of GPGPU workloads on a multidimensional heterogeneous processor., and . ISPASS, page 121-122. IEEE Computer Society, (2017)