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Disambiguation of "Pozzi, Laura"

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Maximum Convex Subgraphs Under I/O Constraint for Automatic Identification of Custom Instructions.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (3): 483-494 (2015)

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Daniel Pozzi

Franz Pozzi

Mario Laura

Marco Laurati

Riccardo Edmondo Pozzi

 

Other publications of authors with the same name

Minimizing the Application Time for Manufacturer Testing of FPGA (Abstract)., , , and . FPGA, page 258. ACM, (1998)HyperPUT: Generating Synthetic Faulty Programs to Challenge Bug-Finding Tools., , and . CoRR, (2022)Judiciously Spreading Approximation Among Arithmetic Components with Top-Down Inexact Hardware Design., , and . ARC, volume 12083 of Lecture Notes in Computer Science, page 14-29. Springer, (2020)Multi-Metric SMT-Based Evaluation of Worst-Case-Error for Approximate Circuits., , , , and . DSN-W, page 199-202. IEEE, (2023)SAT-MapIt: A SAT-based Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures., , and . DATE, page 1-6. IEEE, (2023)Partition and Propagate: an Error Derivation Algorithm for the Design of Approximate Circuits., , , and . DAC, page 40. ACM, (2019)ShellFuzzer: Grammar-based Fuzzing of Shell Interpreters., , and . CoRR, (2024)SAT-Based Exact Modulo Scheduling Mapping for Resource-Constrained CGRAs., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 20 (3): 8:1-8:26 (July 2024)i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-Signal Processing., , , , , and . IEEE Embed. Syst. Lett., 11 (2): 50-53 (2019)Virtual memory window for application-specific reconfigurable coprocessors., , and . DAC, page 948-953. ACM, (2004)