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A 200-mW, 3.3-V, CMOS color camera IC producing 352×288 24-b video at 30 frames/s., , , , , and . IEEE J. Solid State Circuits, 33 (12): 2092-2103 (1998)Timing optimization of combinational logic., , , and . ICCAD, page 282-285. IEEE Computer Society, (1988)Performance Optimization of Pipelined Circuits., , , and . ICCAD, page 410-413. IEEE Computer Society, (1990)A Heuristic Algorithm for the Fanout Problem., and . DAC, page 357-360. IEEE Computer Society Press, (1990)Sequential Circuit Design Using Synthesis and Optimization., , , , , and . ICCD, page 328-333. IEEE Computer Society, (1992)Performance optimization of pipelined logic circuits using peripheral retiming and resynthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (5): 568-578 (1993)A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 35 (3): 412-424 (2000)A single-chip 1.6 billion 16-b MAC/s multiprocessor DSP., , , , , , , , , and 6 other author(s). CICC, page 537-540. IEEE, (1999)Software Environment for a Multiprocessor DSP., , , and . DAC, page 827-830. ACM Press, (1999)On the Temporal Equivalence of Sequential Circuits., , , and . DAC, page 405-409. IEEE Computer Society Press, (1992)