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Disambiguation of "Curran, Brian W."

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Design of the Power6 Microprocessor.

, , , , , , , , , , , , , , , , and . ISSCC, page 96-97. IEEE, (2007)

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Brian Curran

Declan Curran

Rolf-Walter Briant

Benoît Briand

Christopher Curran

 

Other publications of authors with the same name

High-Performance CMOS Circuit Techniques for the G-4 S/390 Microprocessor., , , and . ICCD, page 247-252. IEEE Computer Society, (1997)Deep submicron design techniques for the 500 MHz IBM S/390 G5 custom microprocessor., , , , , , , , , and 2 other author(s). ICCD, page 258-263. IEEE Computer Society, (1998)Across the Stack Opportunities for Deep Learning Acceleration., , , , , , , , , and 21 other author(s). ISLPED, page 35:1-35:2. ACM, (2018)IBM Enterprise System/9000 Type 9121 system controller and memory subsystem design., and . IBM J. Res. Dev., 35 (3): 357-366 (1991)Power-constrained high-frequency circuits for the IBM POWER6 microprocessor., , , , , , and . IBM J. Res. Dev., 51 (6): 715-732 (2007)The zEnterprise 196 System and Microprocessor., , , , , , and . IEEE Micro, 31 (2): 26-40 (2011)A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling., , , , , , , , , and 34 other author(s). IEEE J. Solid State Circuits, 57 (1): 182-197 (2022)RaPiD: AI Accelerator for Ultra-low Precision Training and Inference., , , , , , , , , and 44 other author(s). ISCA, page 153-166. IEEE, (2021)A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference., , , , , , , , , and 33 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology., , , , , , , , , and . IBM J. Res. Dev., 46 (4-5): 631- (2002)