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Disambiguation of "Cong, Jason"

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SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for DNA Sequencing.

, , , , and . FCCM, page 206. IEEE Computer Society, (2018)

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Ian Jason

Irene Congehl

Martha Congehl

Salvador Congost Zimmermann

Lina Cong

 

Other publications of authors with the same name

LUT-based FPGA technology mapping under arbitrary net-delay models., , , and . Comput. Graph., 18 (4): 507-516 (1994)Technology mapping and architecture evalution for k/m-macrocell-based FPGAs., , and . ACM Trans. Design Autom. Electr. Syst., 10 (1): 3-23 (2005)A new algorithm for standard cell global routing., and . Integr., 14 (1): 49-65 (1992)GRT: A Reconfigurable SDR Platform with High Performance and Usability., , , , , , , and . SIGARCH Comput. Archit. News, 42 (4): 51-56 (2014)RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration., , , , , , , , , and 4 other author(s). ACM Trans. Reconfigurable Technol. Syst., 16 (4): 59:1-59:30 (December 2023)Power modeling and characteristics of field programmable gate arrays., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (11): 1712-1724 (2005)Efficient algorithms for the minimum shortest path Steiner arborescence problem with applications to VLSI physical design., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (1): 24-39 (1998)Routability-Driven Placement and White Space Allocation., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (5): 858-871 (2007)A provably good multilayer topological planar routing algorithm in IC layout designs., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (1): 70-78 (1993)FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (1): 1-12 (1994)