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A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage.

, , , , , , , , and . IEEE J. Solid State Circuits, 32 (7): 1013-1026 (1997)

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New Visual Sensors and Processors., , , , , , , , , and 3 other author(s). Spatial Temporal Patterns for Action-Oriented Perception in Roving Robots, volume 1 of Cognitive Systems Monographs, Springer, (2009)SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips., , , , , and . I. J. Circuit Theory and Applications, 27 (1): 43-76 (1999)A CNN Universal Chip in CMOS Technology., , , and . I. J. Circuit Theory and Applications, 24 (1): 93-109 (1996)A 0.8-μm CMOS two-dimensional programmable mixed-signal focal-plane array processor with on-chip binary imaging and instructions storage., , , , , , , , and . IEEE J. Solid State Circuits, 32 (7): 1013-1026 (1997)Smart-pixel cellular neural networks in analog current-mode CMOS technology., , , , and . IEEE J. Solid State Circuits, 29 (8): 895-905 (August 1994)Implementation of non-linear templates using a decomposition technique by a 0.5 μm CMOS CNN universal chip., , , , and . ISCAS, page 401-404. IEEE, (2000)ACE4k: An analog I/O 64×64 visual microprocessor chip with 7-bit analog accuracy., , , and . I. J. Circuit Theory and Applications, 30 (2-3): 89-116 (2002)A VLSI-oriented continuous-time CNN model., , , and . I. J. Circuit Theory and Applications, 24 (3): 341-356 (1996)A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O., , , , , and . IEEE J. Solid State Circuits, 39 (7): 1044-1055 (2004)A 64×64 CNN universal chip with analog and digital I/O., , , and . ICECS, page 203-206. IEEE, (1998)