( en | de | ru )

 

Disambiguation of "Ochi, Hiroyuki"

Author of the publication

copydeleteadd this publication to your clipboard
Selectable grained reconfigurable architecture (SGRA) and its design automation.

, , , and . SoCC, page 196-201. IEEE, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hiroyuki Tan

Hiroyuki Kobayashi

Samuel Ochieng'-Akatch

Justus Ochieng

Hisashi Ochi

 

Other publications of authors with the same name

Fast and memory-efficient GPU implementations of krylov subspace methods for efficient power grid analysis., , , and . ACM Great Lakes Symposium on VLSI, page 95-100. ACM, (2013)Selectable grained reconfigurable architecture (SGRA) and its design automation., , , and . SoCC, page 196-201. IEEE, (2017)Experimental validation of minimum operating-voltage-estimation for low supply voltage circuits., , , and . ISQED, page 428-433. IEEE, (2014)Autonomous Repair Fault Tolerant Dynamic Reconfigurable Device., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (12): 3612-3621 (2008)An Asynchronous IEEE-754-standard Single-precision Floating-point Divider for FPGA., , and . IPSJ Trans. Syst. LSI Des. Methodol., (2009)Network Processor for High-Speed Network and Quick Programming., , , , and . Journal of Circuits, Systems, and Computers, 16 (1): 65-79 (2007)Hot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array., , , , , and . DATE, page 535-540. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Efficient memory architecture for JPEG2000 entropy codec., , , , , and . ISCAS, IEEE, (2006)A Localization Scheme for Sensor Networks based onWireless Communication with Anchor Groups., , and . ICPADS (1), page 299-305. IEEE Computer Society, (2005)Acceleration of random-walk-based linear circuit analysis using importance sampling., , , , and . ACM Great Lakes Symposium on VLSI, page 211-216. ACM, (2011)