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Model matching for finite-state machines., , and . IEEE Trans. Automat. Contr., 46 (11): 1726-1743 (2001)Synthesis of P-circuits for logic restructuring., , , , and . Integr., 45 (3): 282-293 (2012)Theory and algorithms for state minimization of nondeterministic FSMs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (11): 1311-1322 (1997)Symbolic two-level minimization., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (7): 692-708 (1997)Rigorous Function Calculi in Ariadne., , , , and . CoRR, (2023)Exploiting Symmetrization and D-Reducibility for Approximate Logic Synthesis., , and . IEEE Trans. Computers, 71 (1): 121-133 (2022)FSM Encoding for BDD Representations., , , and . Int. J. Appl. Math. Comput. Sci., 17 (1): 113-124 (2007)Boolean Minimization of Projected Sums of Products via Boolean Relations., , , and . IEEE Trans. Computers, 68 (9): 1269-1282 (2019)Ariadne: Dominance Checking of Nonlinear Hybrid Automata Using Reachability Analysis., , , , , and . RP, volume 7550 of Lecture Notes in Computer Science, page 79-91. Springer, (2012)Synthesis of Multilevel Boolean Networks., , , , and . Boolean Models and Methods, Cambridge University Press, (2010)