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A 32.75-Gb/s voltage mode transmitter with 3-tap FFE in 16nm CMOS., , , , , , , , , and 1 other author(s). A-SSCC, page 233-236. IEEE, (2016)A 1.24-pJ/b 112-Gb/s (870 Gb/s/Mm) Transceiver for In-Package Links in 7-nm FinFET., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (4): 1199-1210 (2022)A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET., , , , , , , , , and 11 other author(s). IEEE J. Solid State Circuits, 56 (1): 7-18 (2021)A 1.24pJ/b 112Gb/s (870Gbps/mm) Transceiver for In-package Links in 7nm FinFET., , , , , , , , , and 3 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)A 126mW 56Gb/s NRZ wireline transceiver for synchronous short-reach applications in 16nm FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 274-276. IEEE, (2018)A fully-adaptive wideband 0.5-32.75Gb/s FPGA transceiver in 16nm FinFET CMOS technology., , , , , , , , , and 2 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)A Fully Adaptive 19-58-Gb/s PAM-4 and 9.5-29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 54 (1): 18-28 (2019)A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies., , , , , , , , , and 7 other author(s). ISSCC, page 204-205. IEEE, (2023)A fully adaptive 19-to-56Gb/s PAM-4 wireline transceiver with a configurable ADC in 16nm FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 108-110. IEEE, (2018)A 32.75-Gb/s Voltage-Mode Transmitter With Three-Tap FFE in 16-nm CMOS., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 52 (10): 2663-2678 (2017)