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Disambiguation of "Jr., Walter Godoy"

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Achieving near-MLD performance with soft information-set decoders implemented in FPGAs.

, , , and . APCCAS, page 312-315. IEEE, (2010)

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Maren Rebolledo Godoy

Foued Jrad

Juan Miquel Godoy Ramsay

Fliesslochformen und Gewindefurchen in dünne Bleche und Rohre aus Kupfer und Kupferlegierungen. Uni Kassel, (2009)

Alejandra Godoy-Haeberle

José Rodrigo Godoy Berthet

 

Other publications of authors with the same name

Achieving near-MLD performance with soft information-set decoders implemented in FPGAs., , , and . APCCAS, page 312-315. IEEE, (2010)A fast modular simulator for combinational logic circuits generated by genetic algorithm., , and . IEEE Congress on Evolutionary Computation, page 2797-2801. IEEE, (2013)A proposal of a cryptography algorithm with techniques of error correction., and . Comput. Commun., 20 (15): 1374-1380 (1997)An Improved GF(2) Matrix Inverter with Linear Time Complexity., , , and . ReConFig, page 322-327. IEEE Computer Society, (2010)Particle Swarm Optimization for the Multidimensional Knapsack Problem., , and . ICANNGA (1), volume 4431 of Lecture Notes in Computer Science, page 358-365. Springer, (2007)Proposal of sub-optimum decoding algorithm with a bound of Voronoi region V(C0)., and . Comput. Commun., 21 (8): 736-740 (1998)Analysis of a Bound of Voronoi Region V(C0) and Proposal of Sub-Optimum Decoding Algorithm., and . ITCC, page 690-. IEEE Computer Society, (2001)A Simulation Study of the WFQ Scheduler in a DiffServ Node under LRD Traffic., , and . ICN, page 385-391. IEEE Computer Society, (2008)A Simple Acceptance Criterion for Binary Block Codes Soft-Decision Algorithms., and . AICT/ICIW, page 53. IEEE Computer Society, (2006)A New Model to Manage IDS Alerts., and . ICEIS (3), page 601-604. (2004)