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Zeroing for HW-efficient compressed sensing architectures targeting data compression in wireless sensor networks.

, , , , , , and . Microprocess. Microsystems, (2017)

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An ultra-low power resilient multi-core architecture with static and dynamic tolerance to ambient temperature-induced variability., , and . Microprocess. Microsystems, 38 (8): 776-787 (2014)PHIDIAS: ultra-low-power holistic design for smart bio-signals computing platforms., , , , , , , , , and 2 other author(s). Conf. Computing Frontiers, page 309-314. ACM, (2016)An Ambient Temperature Variation Tolerance Scheme for an Ultra Low Power Shared-L1 Processor Cluster., , and . DSD, page 625-632. IEEE Computer Society, (2013)User-space APIs for dynamic power management in many-core ARMv8 computing nodes., , , and . HPCS, page 675-681. IEEE, (2016)Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs., , , , , , and . DATE, page 491-496. IEEE, (2012)VirtualSoC: A Research Tool for Modern MPSoCs., , and . ACM Trans. Embed. Comput. Syst., 16 (1): 3:1-3:27 (2016)Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor., , , , , , , and . ISLPED, page 45-50. ACM, (2014)A Synchronization-Based Hybrid-Memory Multi-Core Architecture for Energy-Efficient Biomedical Signal Processing., , , , , and . IEEE Trans. Computers, 66 (4): 575-585 (2017)