Author of the publication

6× Higher Restore Speed.

Z. Wang, Y. Liu, A. Lee, F. Su, C. Lo, Z. Yuan, J. Li, C. Lin, W. Chen, H. Chiu, W. Lin, Y. King, C. Lin, P. Amiri, K. Wang, M. Chang, and H. Yang. IEEE J. Solid State Circuits, 52 (10): 2769-2785 (2017)

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Ya Zhang

Elion Chin

Erika Chin

Ya Yang

Chin Buranadham

Other publications of authors with the same name

Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme.M. Chang, C. Kuo, S. Sheu, C. Lin, Y. King, F. Chen, T. Ku, M. Tsai, J. Wu, and Y. Chih. IEEE J. Solid State Circuits, 49 (4): 908-916 (2014)A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time.M. Chang, C. Wu, C. Kuo, S. Shen, K. Lin, S. Yang, Y. King, C. Lin, and Y. Chih. ISSCC, page 434-436. IEEE, (2012)Self-Convergent Trimming SRAM True Random Number Generation With In-Cell Storage.P. Yeh, C. Yang, Y. Chang, Y. Chih, C. Lin, and Y. King. IEEE J. Solid State Circuits, 54 (9): 2614-2621 (2019)A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation.C. Lo, W. Lin, W. Lin, H. Lin, T. Yang, Y. Chiang, Y. King, C. Lin, Y. Chih, T. Chang and 1 other author(s). IEEE J. Solid State Circuits, 54 (2): 584-595 (2019)An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory.M. Chang, S. Shen, C. Liu, C. Wu, Y. Lin, S. Wu, C. Huang, H. Lai, Y. King, C. Lin and 3 other author(s). ISSCC, page 206-208. IEEE, (2011)High Density Embedded 3D Stackable Via RRAM in Advanced MCU Applications.Y. Huang, Y. Hsieh, Y. Lin, Y. Chih, E. Wang, J. Chang, Y. King, and C. Lin. VLSI Technology and Circuits, page 1-2. IEEE, (2023)A novel single poly-silicon EEPROM using trench floating gate.M. Wu, S. Feng, and Y. King. MTDT, page 35-37. IEEE Computer Society, (2005)Low-cost logarithmic CMOS image sensing by nonlinear analog-to-digital conversion.Y. Chuang, S. Chen, S. Huang, and Y. King. IEEE Trans. Consumer Electronics, 51 (4): 1212-1217 (2005)Challenges and Circuit Techniques for Energy-Efficient On-Chip Nonvolatile Memory Using Memristive Devices.M. Chang, A. Lee, P. Chen, C. Lin, Y. King, S. Sheu, and T. Ku. IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (2): 183-193 (2015)A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro.M. Chang, C. Wu, C. Kuo, S. Shen, S. Yang, K. Lin, W. Shen, Y. King, C. Lin, and Y. Chih. IEEE J. Solid State Circuits, 48 (9): 2250-2259 (2013)

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Disambiguation of "King, Ya-Chin"