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Disambiguation of "Sakurai, Takayasu"

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A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS.

, , , , , , , and . IEEE J. Solid State Circuits, 49 (11): 2377-2386 (2014)

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Yoriko Sakurai

Kaneaki Sakurai

Takayasu Shimizu

Miriam Takayasu

 

Other publications of authors with the same name

High-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply Voltage.. ISCAS, page 1487-1490. IEEE, (1993)Ambient electronics and ultra-low power LSI design.. VLSI-DAT, page 1-31. IEEE, (2012)A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme., , , , , , , , and . ISSCC, page 216-218. IEEE, (2011)A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvesting., , , , , , and . A-SSCC, page 33-36. IEEE, (2011)A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS., , , , , , , and . ASP-DAC, page 109-110. IEEE, (2013)An on-chip characterizing system for within-die delay variation measurement of individual standard cells in 65-nm CMOS., , , and . ASP-DAC, page 109-110. IEEE, (2011)0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2010)Digital Active Gate Drive with Optimal Switching Patterns to Adapt to Sinusoidal Output Current in a Full Bridge Inverter Circuit., , , , , , , and . IECON, page 1684-1689. IEEE, (2019)Variable threshold CMOS (VTCMOS) in series connected circuits., , and . ISLPED, page 201-206. ACM, (2001)Estimation of power distribution in VLSI interconnects., and . ISLPED, page 370-375. ACM, (2001)