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Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends., , , , , , , , and . CODES+ISSS, page 3-12. ACM, (2011)3D Embedded multi-core: Some perspectives., , , , and . DATE, page 1327-1332. IEEE, (2011)2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters., , , , , , , , , and 18 other author(s). ISSCC, page 46-48. IEEE, (2020)3D integration for power-efficient computing., , and . DATE, page 779-784. EDA Consortium San Jose, CA, USA / ACM DL, (2013)3D stacking for multi-core architectures: From WIDEIO to distributed caches., , , , and . ISCAS, page 537-540. IEEE, (2013)Thermal analysis and model identification techniques for a logic + WIDEIO stacked DRAM test chip., , , , and . DATE, page 1-4. European Design and Automation Association, (2014)IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management., , , , , , , , , and 18 other author(s). IEEE J. Solid State Circuits, 56 (1): 79-97 (2021)POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems., , , , , , , , , and 5 other author(s). DATE, page 1456-1461. IEEE, (2020)Reconfiguration of a 3GPP-LTE telecommunication application on a 22-core NoC-based system-on-chip., , , , , , , and . NOCS, page 261-262. ACM/IEEE Computer Society, (2011)Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications., , , , , , , and . DAC, page 1137-1142. ACM, (2012)