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Disambiguation of "Nath, Siddhartha"

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Toward Metrics of Design Automation Research Impact.

, , , , , and . ICCAD, page 263-270. IEEE, (2015)

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Siddhartha Chattopadhyay

Siddhartha Roy

Siddhartha Kargupta

Siddhartha Schwenzer

Siddhartha Chib

 

Other publications of authors with the same name

Redefining the Role of the CPU in the Era of CPU-GPU Integration., , , , and . IEEE Micro, 32 (6): 4-16 (2012)BufFormer: A Generative ML Framework for Scalable Buffering., , , , and . ASP-DAC, page 264-270. ACM, (2023)Machine Learning-Enabled High-Frequency Low-Power Digital Design Implementation At Advanced Process Nodes., and . ISPD, page 83-90. ACM, (2021)Generative self-supervised learning for gate sizing: invited., , , , , and . DAC, page 1331-1334. ACM, (2022)A deep learning methodology to proliferate golden signoff timing., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Optimization of Overdrive Signoff in High-Performance and Low-Power ICs., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (8): 1552-1556 (2015)Learning-based prediction of embedded memory timing failures during initial floorplan design., , , , and . ASP-DAC, page 178-185. IEEE, (2016)ORION3.0: A Comprehensive NoC Router Estimation Tool., , and . IEEE Embed. Syst. Lett., 7 (2): 41-45 (2015)Learning-based approximation of interconnect delay and slew in signoff timing tools., , , , and . SLIP, page 1-8. IEEE Computer Society, (2013)SI for free: machine learning of interconnect coupling delay and transition effects., , and . SLIP, page 1-8. IEEE Computer Society, (2015)