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An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI.

, , , and . ESSCIRC, page 437-440. IEEE, (2016)

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A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI., , and . A-SSCC, page 165-168. IEEE, (2017)A Radiation Hardened SRAM with Self-refresh and Compact Error Correction., , , , , and . ISOCC, page 235-236. IEEE, (2018)A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance., , , , and . VLSID, page 266-270. IEEE Computer Society, (2018)A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI., , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (10): 1707-1719 (2021)An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI., , , and . ESSCIRC, page 437-440. IEEE, (2016)Two Phase Write Scheme to Improve Low Voltage Write-ability in Medium-Density SRAMs., , , and . VLSID, page 176-180. IEEE Computer Society, (2015)A 10T SRAM Cell with Enhanced Read Sensing Margin and Weak NMOS Keeper for Large Signal Sensing to Improve VDDMIN., , , , and . ISCAS, page 1-5. IEEE, (2019)Reaction-diffusion based model to develop binocular simple cells in visual cortex along with cortical maps., and . IJCNN, page 1-8. IEEE, (2010)An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI., , , and . IEEE J. Solid State Circuits, 54 (7): 2091-2101 (2019)