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Power-Area Trade-Offs in Divided Word Line Memory Arrays., , and . Journal of Circuits, Systems, and Computers, 7 (1): 49-68 (1997)Using Memory Compression for Energy Reduction in an Embedded Java System., , , , and . Journal of Circuits, Systems, and Computers, 11 (5): 537-556 (2002)Accurate Estimation of Combinational Circuit Activity., , , and . DAC, page 618-622. ACM Press, (1995)Validation of an Architectural Level Power Analysis Technique., , , and . DAC, page 242-245. ACM Press, (1998)On the Effects of Process Variation in Network-on-Chip Architectures., , , , , , and . IEEE Trans. Dependable Secur. Comput., 7 (3): 240-254 (2010)Steven P. Levitan (1950-2016)., and . IEEE Des. Test, 33 (3): 142-143 (2016)Digit Serial Multipliers., , and . J. Parallel Distributed Comput., 11 (2): 156-162 (1991)An integer linear programming-based tool for wireless sensor networks., , , and . J. Parallel Distributed Comput., 65 (3): 247-260 (2005)Special Issue on Parallelism in Computer Arithmetic.. J. Parallel Distributed Comput., 5 (3): 205-208 (1988)Adapting application execution in CMPs using helper threads., , , and . J. Parallel Distributed Comput., 69 (9): 790-806 (2009)