%0 Journal Article %1 journals/tcad/Pomeranz13 %A Pomeranz, Irith %D 2013 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 3 %P 442-452 %T Generation of Functional Broadside Tests for Logic Blocks With Constrained Primary Input Sequences. %U http://dblp.uni-trier.de/db/journals/tcad/tcad32.html#Pomeranz13 %V 32

@article{journals/tcad/Pomeranz13, added-at = {2020-09-24T00:00:00.000+0200}, author = {Pomeranz, Irith}, biburl = {https://www.bibsonomy.org/bibtex/296c8f6c3f68922540d7faaa66d1747f2/dblp}, ee = {https://doi.org/10.1109/TCAD.2012.2227258}, interhash = {0dbb19f7f14b241d07063c4228475bd3}, intrahash = {96c8f6c3f68922540d7faaa66d1747f2}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 3, pages = {442-452}, timestamp = {2020-09-25T11:50:13.000+0200}, title = {Generation of Functional Broadside Tests for Logic Blocks With Constrained Primary Input Sequences.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad32.html#Pomeranz13}, volume = 32, year = 2013 }