%0 Conference Paper %1 conf/dac/ZhuMLLCYC22 %A Zhu, Ziran %A Mei, Yangjie %A Li, Zijun %A Lin, Jingwen %A Chen, Jianli %A Yang, Jun %A Chang, Yao-Wen %B DAC %D 2022 %E Oshana, Rob %I ACM %K dblp %P 643-648 %T High-performance placement for large-scale heterogeneous FPGAs with clock constraints. %U http://dblp.uni-trier.de/db/conf/dac/dac2022.html#ZhuMLLCYC22 %@ 978-1-4503-9142-9

@inproceedings{conf/dac/ZhuMLLCYC22, added-at = {2024-08-13T00:00:00.000+0200}, author = {Zhu, Ziran and Mei, Yangjie and Li, Zijun and Lin, Jingwen and Chen, Jianli and Yang, Jun and Chang, Yao-Wen}, biburl = {https://www.bibsonomy.org/bibtex/201afdaca6e9f12c676ca41c444e46253/dblp}, booktitle = {DAC}, crossref = {conf/dac/2022}, editor = {Oshana, Rob}, ee = {https://doi.org/10.1145/3489517.3530567}, interhash = {01867cb095cc1e86daf420594fee7761}, intrahash = {01afdaca6e9f12c676ca41c444e46253}, isbn = {978-1-4503-9142-9}, keywords = {dblp}, pages = {643-648}, publisher = {ACM}, timestamp = {2024-08-19T07:38:42.000+0200}, title = {High-performance placement for large-scale heterogeneous FPGAs with clock constraints.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2022.html#ZhuMLLCYC22}, year = 2022 }