%0 Journal Article %1 journals/ieicet/MatsukawaNSOKSY15 %A Matsukawa, Go %A Nakata, Yohei %A Sugure, Yasuo %A Oho, Shigeru %A Kimi, Yuta %A Shimozawa, Masafumi %A Yoshida, Shuhei %A Kawaguchi, Hiroshi %A Yoshimoto, Masahiko %D 2015 %J IEICE Trans. Electron. %K dblp %N 4 %P 333-339 %T A Low-Latency DMR Architecture with Fast Checkpoint Recovery Scheme. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet98c.html#MatsukawaNSOKSY15 %V 98-C

@article{journals/ieicet/MatsukawaNSOKSY15, added-at = {2024-03-11T00:00:00.000+0100}, author = {Matsukawa, Go and Nakata, Yohei and Sugure, Yasuo and Oho, Shigeru and Kimi, Yuta and Shimozawa, Masafumi and Yoshida, Shuhei and Kawaguchi, Hiroshi and Yoshimoto, Masahiko}, biburl = {https://www.bibsonomy.org/bibtex/2bf3359a262001ddbea844dfc49835a95/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e98-c_4_333}, interhash = {10e948adce6786afa15981683fb7ad93}, intrahash = {bf3359a262001ddbea844dfc49835a95}, journal = {IEICE Trans. Electron.}, keywords = {dblp}, number = 4, pages = {333-339}, timestamp = {2024-04-08T15:51:56.000+0200}, title = {A Low-Latency DMR Architecture with Fast Checkpoint Recovery Scheme.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet98c.html#MatsukawaNSOKSY15}, volume = {98-C}, year = 2015 }