%0 Conference Paper %1 conf/dsd/AmaricaiNBCP14 %A Amaricai, Alexandru %A Nimara, Sergiu %A Boncalo, Oana %A Chen, Jiaoyan %A Popovici, Emanuel M. %B DSD %D 2014 %I IEEE Computer Society %K dblp %P 473-479 %T Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits. %U http://dblp.uni-trier.de/db/conf/dsd/dsd2014.html#AmaricaiNBCP14 %@ 978-1-4799-5793-4

@inproceedings{conf/dsd/AmaricaiNBCP14, added-at = {2024-06-04T00:00:00.000+0200}, author = {Amaricai, Alexandru and Nimara, Sergiu and Boncalo, Oana and Chen, Jiaoyan and Popovici, Emanuel M.}, biburl = {https://www.bibsonomy.org/bibtex/2db3215a4b3d595e543abda006c105287/dblp}, booktitle = {DSD}, crossref = {conf/dsd/2014}, ee = {https://doi.ieeecomputersociety.org/10.1109/DSD.2014.92}, interhash = {14f3cc10c2282a1f759fe22e4db9d3c8}, intrahash = {db3215a4b3d595e543abda006c105287}, isbn = {978-1-4799-5793-4}, keywords = {dblp}, pages = {473-479}, publisher = {IEEE Computer Society}, timestamp = {2024-06-10T07:20:52.000+0200}, title = {Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits.}, url = {http://dblp.uni-trier.de/db/conf/dsd/dsd2014.html#AmaricaiNBCP14}, year = 2014 }