%0 Journal Article %1 journals/jssc/LeeKCSPKKCC12 %A Lee, Hyun-Woo %A Kim, Ki-Han %A Choi, Young-Kyoung %A Sohn, Ju-Hwan %A Park, Nak-Kyu %A Kim, Kwan-Weon %A Kim, Chulwoo %A Choi, Young-Jung %A Chung, Byong-Tae %D 2012 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 131-140 %T A 1.6 V 1.4 Gbp/s/pin Consumer DRAM With Self-Dynamic Voltage Scaling Technique in 44 nm CMOS Technology. %U http://dblp.uni-trier.de/db/journals/jssc/jssc47.html#LeeKCSPKKCC12 %V 47

@article{journals/jssc/LeeKCSPKKCC12, added-at = {2020-08-30T00:00:00.000+0200}, author = {Lee, Hyun-Woo and Kim, Ki-Han and Choi, Young-Kyoung and Sohn, Ju-Hwan and Park, Nak-Kyu and Kim, Kwan-Weon and Kim, Chulwoo and Choi, Young-Jung and Chung, Byong-Tae}, biburl = {https://www.bibsonomy.org/bibtex/28ec56247292f53a2abc7e4d60e5951a4/dblp}, ee = {https://doi.org/10.1109/JSSC.2011.2164710}, interhash = {18fa0c0f394a96c63a12e4ebf3b17436}, intrahash = {8ec56247292f53a2abc7e4d60e5951a4}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {131-140}, timestamp = {2020-08-31T11:41:10.000+0200}, title = {A 1.6 V 1.4 Gbp/s/pin Consumer DRAM With Self-Dynamic Voltage Scaling Technique in 44 nm CMOS Technology.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc47.html#LeeKCSPKKCC12}, volume = 47, year = 2012 }