%0 Journal Article %1 journals/tcad/GuptaAJ06 %A Gupta, Pallav %A Agrawal, Abhinav %A Jha, Niraj K. %D 2006 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 11 %P 2317-2330 %T An Algorithm for Synthesis of Reversible Logic Circuits. %U http://dblp.uni-trier.de/db/journals/tcad/tcad25.html#GuptaAJ06 %V 25

@article{journals/tcad/GuptaAJ06, added-at = {2020-09-24T00:00:00.000+0200}, author = {Gupta, Pallav and Agrawal, Abhinav and Jha, Niraj K.}, biburl = {https://www.bibsonomy.org/bibtex/20fd7342fc38a8a8ec3c7ac087def9ed6/dblp}, ee = {https://doi.org/10.1109/TCAD.2006.871622}, interhash = {1a353c2e8f0ca929c23a0560980c21ad}, intrahash = {0fd7342fc38a8a8ec3c7ac087def9ed6}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 11, pages = {2317-2330}, timestamp = {2020-09-25T11:47:02.000+0200}, title = {An Algorithm for Synthesis of Reversible Logic Circuits.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad25.html#GuptaAJ06}, volume = 25, year = 2006 }