%0 Journal Article %1 journals/tcs/GolovnevKST18 %A Golovnev, Alexander %A Kulikov, Alexander S. %A Smal, Alexander V. %A Tamaki, Suguru %D 2018 %J Theor. Comput. Sci. %K dblp %P 46-63 %T Gate elimination: Circuit size lower bounds and #SAT upper bounds. %U http://dblp.uni-trier.de/db/journals/tcs/tcs719.html#GolovnevKST18 %V 719

@article{journals/tcs/GolovnevKST18, added-at = {2019-09-25T00:00:00.000+0200}, author = {Golovnev, Alexander and Kulikov, Alexander S. and Smal, Alexander V. and Tamaki, Suguru}, biburl = {https://www.bibsonomy.org/bibtex/267c44749b1ea3b7a3ed612420487ffb7/dblp}, ee = {https://doi.org/10.1016/j.tcs.2017.11.008}, interhash = {2113f87b869c1f6524ec1d15bbb05e10}, intrahash = {67c44749b1ea3b7a3ed612420487ffb7}, journal = {Theor. Comput. Sci.}, keywords = {dblp}, pages = {46-63}, timestamp = {2019-09-26T12:00:58.000+0200}, title = {Gate elimination: Circuit size lower bounds and #SAT upper bounds.}, url = {http://dblp.uni-trier.de/db/journals/tcs/tcs719.html#GolovnevKST18}, volume = 719, year = 2018 }