%0 Conference Paper %1 conf/iscas/LeeCLC06 %A Lee, Shuenn-Yuh %A Chen, Chia-Chyang %A Lee, Shyh-Chyang %A Cheng, Chih-Jen %B ISCAS %D 2006 %I IEEE %K dblp %T A low-power VLSI architecture for a shared-memory FFT processor with a mixed-radix algorithm and a simple memory control scheme. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#LeeCLC06 %@ 0-7803-9389-9

@inproceedings{conf/iscas/LeeCLC06, added-at = {2007-07-23T00:00:00.000+0200}, author = {Lee, Shuenn-Yuh and Chen, Chia-Chyang and Lee, Shyh-Chyang and Cheng, Chih-Jen}, biburl = {https://www.bibsonomy.org/bibtex/293751f1ebec8f453525e42fd1526f50d/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2006}, ee = {http://dx.doi.org/10.1109/ISCAS.2006.1692546}, interhash = {3115055f4d6dda4cfb06de873e2cd880}, intrahash = {93751f1ebec8f453525e42fd1526f50d}, isbn = {0-7803-9389-9}, keywords = {dblp}, publisher = {IEEE}, timestamp = {2016-05-21T12:11:32.000+0200}, title = {A low-power VLSI architecture for a shared-memory FFT processor with a mixed-radix algorithm and a simple memory control scheme.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2006.html#LeeCLC06}, year = 2006 }