%0 Journal Article %1 journals/jssc/YinZXLCLYX19 %A Yin, Yun %A Zhu, Yiting %A Xiong, Liang %A Luo, Wei %A Chen, Bowen %A Li, Tong %A Yan, Na %A Xu, Hongtao %D 2019 %J IEEE J. Solid State Circuits %K dblp %N 3 %P 709-719 %T A Compact Transformer-Combined Polar/Quadrature Reconfigurable Digital Power Amplifier in 28-nm Logic LP CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#YinZXLCLYX19 %V 54

@article{journals/jssc/YinZXLCLYX19, added-at = {2020-08-30T00:00:00.000+0200}, author = {Yin, Yun and Zhu, Yiting and Xiong, Liang and Luo, Wei and Chen, Bowen and Li, Tong and Yan, Na and Xu, Hongtao}, biburl = {https://www.bibsonomy.org/bibtex/221b23b4489f5111dadce90b94365a8fa/dblp}, ee = {https://doi.org/10.1109/JSSC.2018.2878831}, interhash = {37d25703ad327e011818a19e6d3cf57b}, intrahash = {21b23b4489f5111dadce90b94365a8fa}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 3, pages = {709-719}, timestamp = {2020-08-31T11:42:04.000+0200}, title = {A Compact Transformer-Combined Polar/Quadrature Reconfigurable Digital Power Amplifier in 28-nm Logic LP CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#YinZXLCLYX19}, volume = 54, year = 2019 }