%0 Journal Article %1 journals/tvlsi/BhatiaH00 %A Bhatia, Dinesh %A Haralambides, James %D 2000 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 3 %P 346-355 %T Resource requirements and layouts for field programmable interconnection chips. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi8.html#BhatiaH00 %V 8

@article{journals/tvlsi/BhatiaH00, added-at = {2020-03-11T00:00:00.000+0100}, author = {Bhatia, Dinesh and Haralambides, James}, biburl = {https://www.bibsonomy.org/bibtex/2d1dd37155b42e235a7dbee57738480da/dblp}, ee = {https://doi.org/10.1109/92.845901}, interhash = {38499384477cbd71e5283d66b7889553}, intrahash = {d1dd37155b42e235a7dbee57738480da}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 3, pages = {346-355}, timestamp = {2020-03-12T11:45:34.000+0100}, title = {Resource requirements and layouts for field programmable interconnection chips.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi8.html#BhatiaH00}, volume = 8, year = 2000 }