%0 Conference Paper %1 conf/icicdt/KoJSN17 %A Ko, Eunah %A Jo, Jaesung %A Shin, Changhwan %A Nguyen, Bich-Yen %B ICICDT %D 2017 %I IEEE %K dblp %P 1-3 %T Layout engineering to suppress hysteresis of negative capacitance FinFET. %U http://dblp.uni-trier.de/db/conf/icicdt/icicdt2017.html#KoJSN17 %@ 978-1-5090-4502-0

@inproceedings{conf/icicdt/KoJSN17, added-at = {2018-07-06T00:00:00.000+0200}, author = {Ko, Eunah and Jo, Jaesung and Shin, Changhwan and Nguyen, Bich-Yen}, biburl = {https://www.bibsonomy.org/bibtex/27a1768027b4ad7bd29e5ba6bd8150f89/dblp}, booktitle = {ICICDT}, crossref = {conf/icicdt/2017}, ee = {https://doi.org/10.1109/ICICDT.2017.7993498}, interhash = {3e31f11f5fef65f2d8b181068e725929}, intrahash = {7a1768027b4ad7bd29e5ba6bd8150f89}, isbn = {978-1-5090-4502-0}, keywords = {dblp}, pages = {1-3}, publisher = {IEEE}, timestamp = {2018-07-07T11:37:54.000+0200}, title = {Layout engineering to suppress hysteresis of negative capacitance FinFET.}, url = {http://dblp.uni-trier.de/db/conf/icicdt/icicdt2017.html#KoJSN17}, year = 2017 }