%0 Conference Paper %1 conf/fpl/JiaoLCZW17 %A Jiao, Li %A Luo, Cheng %A Cao, Wei %A Zhou, Xuegong %A Wang, Lingli %B FPL %D 2017 %E Santambrogio, Marco D. %E Göhringer, Diana %E Stroobandt, Dirk %E Mentens, Nele %E Nurmi, Jari %I IEEE %K dblp %P 1-4 %T Accelerating low bit-width convolutional neural networks with embedded FPGA. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2017.html#JiaoLCZW17 %@ 978-9-0903-0428-1

@inproceedings{conf/fpl/JiaoLCZW17, added-at = {2018-08-06T00:00:00.000+0200}, author = {Jiao, Li and Luo, Cheng and Cao, Wei and Zhou, Xuegong and Wang, Lingli}, biburl = {https://www.bibsonomy.org/bibtex/2e626f699bf8b801748a8076d016229c4/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2017}, editor = {Santambrogio, Marco D. and Göhringer, Diana and Stroobandt, Dirk and Mentens, Nele and Nurmi, Jari}, ee = {https://doi.org/10.23919/FPL.2017.8056820}, interhash = {3ffab62e147cb70e58f0f9b2e638473a}, intrahash = {e626f699bf8b801748a8076d016229c4}, isbn = {978-9-0903-0428-1}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-10-17T19:13:11.000+0200}, title = {Accelerating low bit-width convolutional neural networks with embedded FPGA.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2017.html#JiaoLCZW17}, year = 2017 }