%0 Conference Paper %1 conf/iscas/WuSWSS99 %A Wu, Che-Han %A Shieh, Ming-Der %A Wu, Chien-Hsing %A Sheu, Ming-Hwa %A Sheu, Jia-Lin %B ISCAS (1) %D 1999 %I IEEE %K dblp %P 500-503 %T A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1999-1.html#WuSWSS99 %@ 0-7803-5471-0

@inproceedings{conf/iscas/WuSWSS99, added-at = {2016-05-20T00:00:00.000+0200}, author = {Wu, Che-Han and Shieh, Ming-Der and Wu, Chien-Hsing and Sheu, Ming-Hwa and Sheu, Jia-Lin}, biburl = {https://www.bibsonomy.org/bibtex/2928cd73455cf241806483297fe2e2fd2/dblp}, booktitle = {ISCAS (1)}, crossref = {conf/iscas/1999}, ee = {http://dx.doi.org/10.1109/ISCAS.1999.777938}, interhash = {42874bded6b044be0c71b9ce9b907c44}, intrahash = {928cd73455cf241806483297fe2e2fd2}, isbn = {0-7803-5471-0}, keywords = {dblp}, pages = {500-503}, publisher = {IEEE}, timestamp = {2016-05-21T11:38:50.000+0200}, title = {A VLSI architecture of fast high-radix modular multiplication for RSA cryptosystem.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1999-1.html#WuSWSS99}, year = 1999 }