%0 Conference Paper %1 conf/aspdac/YasudaFO01 %A Yasuda, Takeo %A Fujita, Hiroaki %A Onodera, Hidetoshi %B ASP-DAC %D 2001 %E Goto, Satoshi %I ACM %K dblp %P 275-280 %T A dynamically phase adjusting PLL with a variable delay. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2001.html#YasudaFO01 %@ 0-7803-6634-4

@inproceedings{conf/aspdac/YasudaFO01, added-at = {2018-11-06T00:00:00.000+0100}, author = {Yasuda, Takeo and Fujita, Hiroaki and Onodera, Hidetoshi}, biburl = {https://www.bibsonomy.org/bibtex/2a1e01c7f7031209fd78d838d6f5f9a8b/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2001}, editor = {Goto, Satoshi}, ee = {https://doi.org/10.1145/370155.370348}, interhash = {474994b8daf35bd2709c3172f5610386}, intrahash = {a1e01c7f7031209fd78d838d6f5f9a8b}, isbn = {0-7803-6634-4}, keywords = {dblp}, pages = {275-280}, publisher = {ACM}, timestamp = {2019-10-17T16:43:55.000+0200}, title = {A dynamically phase adjusting PLL with a variable delay.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2001.html#YasudaFO01}, year = 2001 }