%0 Journal Article %1 journals/tcad/BalachandranB05 %A Balachandran, Shankar %A Bhatia, Dinesh %D 2005 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 7 %P 1054-1065 %T A priori wirelength and interconnect estimation based on circuit characteristic. %U http://dblp.uni-trier.de/db/journals/tcad/tcad24.html#BalachandranB05 %V 24

@article{journals/tcad/BalachandranB05, added-at = {2020-09-24T00:00:00.000+0200}, author = {Balachandran, Shankar and Bhatia, Dinesh}, biburl = {https://www.bibsonomy.org/bibtex/29a494879a6306280c63d8287b9312168/dblp}, ee = {https://doi.org/10.1109/TCAD.2005.850868}, interhash = {4bf55b24188af222f349c987a94daff7}, intrahash = {9a494879a6306280c63d8287b9312168}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 7, pages = {1054-1065}, timestamp = {2020-09-25T11:46:50.000+0200}, title = {A priori wirelength and interconnect estimation based on circuit characteristic.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad24.html#BalachandranB05}, volume = 24, year = 2005 }