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%0 Conference Paper
%1 conf/vlsi/MurganMPBG06
%A Murgan, Tudor
%A Mitea, Oliver
%A Pandey, Sujan
%A Bacinschi, Petru Bogdan
%A Glesner, Manfred
%B VLSI-SoC
%D 2006
%I IEEE
%K dblp
%P 302-307
%T Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.
%U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2006.html#MurganMPBG06
@inproceedings{conf/vlsi/MurganMPBG06,
added-at = {2011-12-15T00:00:00.000+0100},
author = {Murgan, Tudor and Mitea, Oliver and Pandey, Sujan and Bacinschi, Petru Bogdan and Glesner, Manfred},
biburl = {https://www.bibsonomy.org/bibtex/231bdff51c8991faaac014f69886a1d6a/dblp},
booktitle = {VLSI-SoC},
crossref = {conf/vlsi/2006soc},
ee = {http://dx.doi.org/10.1109/VLSISOC.2006.313251},
interhash = {4fae72a7cdfc38b1ff0c91f5fdf11dde},
intrahash = {31bdff51c8991faaac014f69886a1d6a},
keywords = {dblp},
pages = {302-307},
publisher = {IEEE},
timestamp = {2011-12-16T11:40:12.000+0100},
title = {Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters.},
url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2006.html#MurganMPBG06},
year = 2006
}