%0 Journal Article %1 journals/cssp/GuoWLWW19 %A Guo, Yina %A Wang, Tao %A Li, Jianyu %A Wang, Anhong %A Wang, Wenwu %D 2019 %J Circuits Syst. Signal Process. %K dblp %N 8 %P 3818-3840 %T Multiple Input Single Output Phase Retrieval. %U http://dblp.uni-trier.de/db/journals/cssp/cssp38.html#GuoWLWW19 %V 38

@article{journals/cssp/GuoWLWW19, added-at = {2023-01-05T00:00:00.000+0100}, author = {Guo, Yina and Wang, Tao and Li, Jianyu and Wang, Anhong and Wang, Wenwu}, biburl = {https://www.bibsonomy.org/bibtex/2461621a9542a454a74fb704e58aaa253/dblp}, ee = {https://doi.org/10.1007/s00034-019-01030-3}, interhash = {598f362ed1cdcb16fe8faaf0a267c5e0}, intrahash = {461621a9542a454a74fb704e58aaa253}, journal = {Circuits Syst. Signal Process.}, keywords = {dblp}, number = 8, pages = {3818-3840}, timestamp = {2024-04-08T15:53:30.000+0200}, title = {Multiple Input Single Output Phase Retrieval.}, url = {http://dblp.uni-trier.de/db/journals/cssp/cssp38.html#GuoWLWW19}, volume = 38, year = 2019 }