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%0 Journal Article
%1 journals/ibmrd/MakWS09
%A kin Mak, Pak
%A Walters, Craig R.
%A Strait, Gary E.
%D 2009
%J IBM J. Res. Dev.
%K dblp
%N 1
%P 2
%T IBM System z10 processor cache subsystem microarchitecture.
%U http://dblp.uni-trier.de/db/journals/ibmrd/ibmrd53.html#MakWS09
%V 53
@article{journals/ibmrd/MakWS09,
added-at = {2020-03-13T00:00:00.000+0100},
author = {kin Mak, Pak and Walters, Craig R. and Strait, Gary E.},
biburl = {https://www.bibsonomy.org/bibtex/25f6d4b2a1d75ce185298cca8eca97d05/dblp},
ee = {https://doi.org/10.1147/JRD.2009.5388579},
interhash = {65478c1b84fb407fb11b528d06a746f0},
intrahash = {5f6d4b2a1d75ce185298cca8eca97d05},
journal = {IBM J. Res. Dev.},
keywords = {dblp},
number = 1,
pages = 2,
timestamp = {2020-03-14T11:47:02.000+0100},
title = {IBM System z10 processor cache subsystem microarchitecture.},
url = {http://dblp.uni-trier.de/db/journals/ibmrd/ibmrd53.html#MakWS09},
volume = 53,
year = 2009
}