%0 Conference Paper %1 conf/iscas/MoonZN94 %A Moon, Gyu %A Zaghloul, Mona E. %A Newcomb, R. W. %B ISCAS %D 1994 %I IEEE %K dblp %P 379-382 %T CMOS Design of Two Winner-Take-All Circuits Using Pulse Duty Cycle Synaptic Weighting. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1994-6.html#MoonZN94 %@ 0-7803-1916-8

@inproceedings{conf/iscas/MoonZN94, added-at = {2016-05-23T00:00:00.000+0200}, author = {Moon, Gyu and Zaghloul, Mona E. and Newcomb, R. W.}, biburl = {https://www.bibsonomy.org/bibtex/2f0ee8c9bcc82aecd711b8c6245cf4183/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/1994}, ee = {http://dx.doi.org/10.1109/ISCAS.1994.409605}, interhash = {6974003f96e7d498efe12b2071e06926}, intrahash = {f0ee8c9bcc82aecd711b8c6245cf4183}, isbn = {0-7803-1916-8}, keywords = {dblp}, pages = {379-382}, publisher = {IEEE}, timestamp = {2016-05-24T11:51:44.000+0200}, title = {CMOS Design of Two Winner-Take-All Circuits Using Pulse Duty Cycle Synaptic Weighting.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1994-6.html#MoonZN94}, year = 1994 }