%0 Conference Paper %1 conf/fpga/ChengWC22 %A Cheng, Jianyi %A Wickerson, John %A Constantinides, George A. %B FPGA %D 2022 %E Adler, Michael %E Ienne, Paolo %I ACM %K dblp %P 89-100 %T Finding and Finessing Static Islands in Dynamically Scheduled Circuits. %U http://dblp.uni-trier.de/db/conf/fpga/fpga2022.html#ChengWC22 %@ 978-1-4503-9149-8

@inproceedings{conf/fpga/ChengWC22, added-at = {2022-02-14T00:00:00.000+0100}, author = {Cheng, Jianyi and Wickerson, John and Constantinides, George A.}, biburl = {https://www.bibsonomy.org/bibtex/2a914cbc25a17971d4857099f37451ad0/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2022}, editor = {Adler, Michael and Ienne, Paolo}, ee = {https://doi.org/10.1145/3490422.3502362}, interhash = {6d529ff93e6f47c79e015e99e0cd2ad7}, intrahash = {a914cbc25a17971d4857099f37451ad0}, isbn = {978-1-4503-9149-8}, keywords = {dblp}, pages = {89-100}, publisher = {ACM}, timestamp = {2024-04-09T12:10:07.000+0200}, title = {Finding and Finessing Static Islands in Dynamically Scheduled Circuits.}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2022.html#ChengWC22}, year = 2022 }