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%0 Conference Paper
%1 conf/fpt/GaneshSSJ04
%A Ganesh, T. S.
%A Sudarshan, T. S. B.
%A Srinivasan, Naveen Kumar
%A Jayapal, Karthick
%B FPT
%D 2004
%E Diessel, Oliver
%E Williams, John
%I IEEE
%K dblp
%P 323-326
%T Pre-silicon prototyping of a unified hardware architecture for cryptographic manipulation detection codes.
%U http://dblp.uni-trier.de/db/conf/fpt/fpt2004.html#GaneshSSJ04
@inproceedings{conf/fpt/GaneshSSJ04,
added-at = {2017-05-24T00:00:00.000+0200},
author = {Ganesh, T. S. and Sudarshan, T. S. B. and Srinivasan, Naveen Kumar and Jayapal, Karthick},
biburl = {https://www.bibsonomy.org/bibtex/20c0e17c315c33266c8f3cdd25e6a99af/dblp},
booktitle = {FPT},
crossref = {conf/fpt/2004},
editor = {Diessel, Oliver and Williams, John},
ee = {https://doi.org/10.1109/FPT.2004.1393290},
interhash = {6f134824f6fb760189dad298c36013e1},
intrahash = {0c0e17c315c33266c8f3cdd25e6a99af},
keywords = {dblp},
pages = {323-326},
publisher = {IEEE},
timestamp = {2019-11-23T11:40:47.000+0100},
title = {Pre-silicon prototyping of a unified hardware architecture for cryptographic manipulation detection codes.},
url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2004.html#GaneshSSJ04},
year = 2004
}
