%0 Conference Paper %1 conf/isvlsi/CondiaFR22 %A Condia, Josie E. Rodriguez %A Faggiano, Riccardo %A Reorda, Matteo Sonza %B ISVLSI %D 2022 %I IEEE %K dblp %P 26-31 %T Microarchitectural Reliability Evaluation of a Block Scheduling Controller in GPUs. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2022.html#CondiaFR22 %@ 978-1-6654-6605-9

@inproceedings{conf/isvlsi/CondiaFR22, added-at = {2024-02-05T00:00:00.000+0100}, author = {Condia, Josie E. Rodriguez and Faggiano, Riccardo and Reorda, Matteo Sonza}, biburl = {https://www.bibsonomy.org/bibtex/2b23d90c82444706d324642b93dad715a/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2022}, ee = {https://doi.org/10.1109/ISVLSI54635.2022.00018}, interhash = {7240e388a557724bdcf53054dc707296}, intrahash = {b23d90c82444706d324642b93dad715a}, isbn = {978-1-6654-6605-9}, keywords = {dblp}, pages = {26-31}, publisher = {IEEE}, timestamp = {2024-04-09T11:37:04.000+0200}, title = {Microarchitectural Reliability Evaluation of a Block Scheduling Controller in GPUs.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2022.html#CondiaFR22}, year = 2022 }