%0 Journal Article %1 journals/jssc/WangSUMM19 %A Wang, Biao %A Sin, Sai-Weng %A U, Seng-Pan %A Maloberti, Franco %A Martins, Rui Paulo %D 2019 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 1161-1172 %T A 550- $\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#WangSUMM19 %V 54

@article{journals/jssc/WangSUMM19, added-at = {2023-08-28T00:00:00.000+0200}, author = {Wang, Biao and Sin, Sai-Weng and U, Seng-Pan and Maloberti, Franco and Martins, Rui Paulo}, biburl = {https://www.bibsonomy.org/bibtex/2bfc69c2ebac999ad2be02a82245d9fa9/dblp}, ee = {https://www.wikidata.org/entity/Q115534972}, interhash = {7b49cdb723e21e87b51f3907500cd490}, intrahash = {bfc69c2ebac999ad2be02a82245d9fa9}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {1161-1172}, timestamp = {2024-04-08T10:44:25.000+0200}, title = {A 550- $\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc54.html#WangSUMM19}, volume = 54, year = 2019 }