%0 Conference Paper %1 conf/fpl/Pasca12 %A Pasca, Bogdan %B FPL %D 2012 %E Koch, Dirk %E Singh, Satnam %E Tørresen, Jim %I IEEE %K dblp %P 249-254 %T Correctly rounded floating-point division for DSP-enabled FPGAs. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2012.html#Pasca12 %@ 978-1-4673-2257-7

@inproceedings{conf/fpl/Pasca12, added-at = {2024-02-05T00:00:00.000+0100}, author = {Pasca, Bogdan}, biburl = {https://www.bibsonomy.org/bibtex/26038a9d159e70465262cb15356c63ead/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2012}, editor = {Koch, Dirk and Singh, Satnam and Tørresen, Jim}, ee = {https://doi.org/10.1109/FPL.2012.6339189}, interhash = {7c65d7871582616ff314166a5b857208}, intrahash = {6038a9d159e70465262cb15356c63ead}, isbn = {978-1-4673-2257-7}, keywords = {dblp}, pages = {249-254}, publisher = {IEEE}, timestamp = {2024-04-10T14:51:32.000+0200}, title = {Correctly rounded floating-point division for DSP-enabled FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2012.html#Pasca12}, year = 2012 }