%0 Journal Article %1 journals/ieicet/TakataM09 %A Takata, Taiga %A Matsunaga, Yusuke %D 2009 %J IEICE Trans. Fundam. Electron. Commun. Comput. Sci. %K dblp %N 12 %P 3268-3275 %T Efficient Cut Enumeration Heuristics for Depth-Optimum Technology Mapping for LUT-Based FPGAs. %U http://dblp.uni-trier.de/db/journals/ieicet/ieicet92a.html#TakataM09 %V 92-A

@article{journals/ieicet/TakataM09, added-at = {2020-04-11T00:00:00.000+0200}, author = {Takata, Taiga and Matsunaga, Yusuke}, biburl = {https://www.bibsonomy.org/bibtex/2991cc39789962f394708d3df77dd7f1a/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e92-a_12_3268}, interhash = {7fa41af34bfdce1357abec10fc95766d}, intrahash = {991cc39789962f394708d3df77dd7f1a}, journal = {IEICE Trans. Fundam. Electron. Commun. Comput. Sci.}, keywords = {dblp}, number = 12, pages = {3268-3275}, timestamp = {2020-04-14T12:02:06.000+0200}, title = {Efficient Cut Enumeration Heuristics for Depth-Optimum Technology Mapping for LUT-Based FPGAs.}, url = {http://dblp.uni-trier.de/db/journals/ieicet/ieicet92a.html#TakataM09}, volume = {92-A}, year = 2009 }