%0 Journal Article %1 journals/tvlsi/Olivieri02 %A Olivieri, Mauro %D 2002 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 5 %P 595-600 %T Theoretical system-level limits of power dissipation reduction under a performance constraint in VLSI microprocessor design. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#Olivieri02 %V 10

@article{journals/tvlsi/Olivieri02, added-at = {2020-03-11T00:00:00.000+0100}, author = {Olivieri, Mauro}, biburl = {https://www.bibsonomy.org/bibtex/24e6400d5376ca7d3351e34522327e11c/dblp}, ee = {https://doi.org/10.1109/TVLSI.2002.801549}, interhash = {878c97a6a56f20539d394c7fb42a4730}, intrahash = {4e6400d5376ca7d3351e34522327e11c}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 5, pages = {595-600}, timestamp = {2020-03-12T11:42:36.000+0100}, title = {Theoretical system-level limits of power dissipation reduction under a performance constraint in VLSI microprocessor design.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi10.html#Olivieri02}, volume = 10, year = 2002 }