Inproceedings,
FPGA versus GPU for Speed-Limit-Sign Recognition.
M. Yih, J. Ota, J. Owens, and P. Muyan-Özçelik.ITSC, page 843-850. IEEE, (2018)
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- conf/itsc/YihOOM18
- entry type
- inproceedings
- booktitle
- ITSC
- year
- 2018
- pages
- 843-850
- publisher
- IEEE
- crossref
- conf/itsc/2018
- ee
- https://doi.org/10.1109/ITSC.2018.8569462
- isbn
- 978-1-7281-0323-5
- url
- http://dblp.uni-trier.de/db/conf/itsc/itsc2018.html#YihOOM18
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- please select -%0 Conference Paper
%1 conf/itsc/YihOOM18
%A Yih, Matthew
%A Ota, Jeffrey M.
%A Owens, John D.
%A Muyan-Özçelik, Pinar
%B ITSC
%D 2018
%E Zhang, Wei-Bin
%E Bayen, Alexandre M.
%E Medina, Javier J. Sánchez
%E Barth, Matthew J.
%I IEEE
%K dblp
%P 843-850
%T FPGA versus GPU for Speed-Limit-Sign Recognition.
%U http://dblp.uni-trier.de/db/conf/itsc/itsc2018.html#YihOOM18
%@ 978-1-7281-0323-5
@inproceedings{conf/itsc/YihOOM18,
added-at = {2018-12-12T00:00:00.000+0100},
author = {Yih, Matthew and Ota, Jeffrey M. and Owens, John D. and Muyan-Özçelik, Pinar},
biburl = {https://www.bibsonomy.org/bibtex/2a36c3a35334f0caadb3fcd2d618da6af/dblp},
booktitle = {ITSC},
crossref = {conf/itsc/2018},
editor = {Zhang, Wei-Bin and Bayen, Alexandre M. and Medina, Javier J. Sánchez and Barth, Matthew J.},
ee = {https://doi.org/10.1109/ITSC.2018.8569462},
interhash = {89440c4d0839dfd154a19ee87a6d7beb},
intrahash = {a36c3a35334f0caadb3fcd2d618da6af},
isbn = {978-1-7281-0323-5},
keywords = {dblp},
pages = {843-850},
publisher = {IEEE},
timestamp = {2018-12-13T11:39:32.000+0100},
title = {FPGA versus GPU for Speed-Limit-Sign Recognition.},
url = {http://dblp.uni-trier.de/db/conf/itsc/itsc2018.html#YihOOM18},
year = 2018
}