Please log in to take part in the discussion (add own reviews or comments).
Cite this publication
More citation styles
- please select -
%0 Conference Paper
%1 conf/cicc/MokhtarASBKO21
%A Mokhtar, Mohamed A.
%A Abdelaal, Ahmed
%A Sporer, Markus
%A Becker, Joachim
%A Kauffman, John G.
%A Ortmanns, Maurits
%B CICC
%D 2021
%I IEEE
%K dblp
%P 1-2
%T A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s Continuous Time Incremental Delta-Sigma ADC Utilizing Variable Bit Width Quantizer in 28nm CMOS.
%U http://dblp.uni-trier.de/db/conf/cicc/cicc2021.html#MokhtarASBKO21
%@ 978-1-7281-7581-2
@inproceedings{conf/cicc/MokhtarASBKO21,
added-at = {2022-12-07T00:00:00.000+0100},
author = {Mokhtar, Mohamed A. and Abdelaal, Ahmed and Sporer, Markus and Becker, Joachim and Kauffman, John G. and Ortmanns, Maurits},
biburl = {https://www.bibsonomy.org/bibtex/290f964220f8ea30e7cec0320d46b2668/dblp},
booktitle = {CICC},
crossref = {conf/cicc/2021},
ee = {https://doi.org/10.1109/CICC51472.2021.9431391},
interhash = {8c3c52cfb0d3adedce2f3a6f201bba07},
intrahash = {90f964220f8ea30e7cec0320d46b2668},
isbn = {978-1-7281-7581-2},
keywords = {dblp},
pages = {1-2},
publisher = {IEEE},
timestamp = {2024-04-09T19:39:37.000+0200},
title = {A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s Continuous Time Incremental Delta-Sigma ADC Utilizing Variable Bit Width Quantizer in 28nm CMOS.},
url = {http://dblp.uni-trier.de/db/conf/cicc/cicc2021.html#MokhtarASBKO21},
year = 2021
}