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%0 Journal Article
%1 journals/integration/CabaRDBAL19
%A Caba, Julián
%A Rincón, Fernando
%A Dondo, Julio
%A Barba, Jesús
%A Abaldea, Manuel J.
%A López, Juan Carlos
%D 2019
%J Integr.
%K dblp
%P 129-138
%T Testing framework for on-board verification of HLS modules using grey-box technique and FPGA overlays.
%U http://dblp.uni-trier.de/db/journals/integration/integration68.html#CabaRDBAL19
%V 68
@article{journals/integration/CabaRDBAL19,
added-at = {2020-12-29T00:00:00.000+0100},
author = {Caba, Julián and Rincón, Fernando and Dondo, Julio and Barba, Jesús and Abaldea, Manuel J. and López, Juan Carlos},
biburl = {https://www.bibsonomy.org/bibtex/2eedce66a4af643719e4a8d95d3fb26b5/dblp},
ee = {https://doi.org/10.1016/j.vlsi.2019.06.011},
interhash = {8ce3f8053ebd7ad66e234fd73701af43},
intrahash = {eedce66a4af643719e4a8d95d3fb26b5},
journal = {Integr.},
keywords = {dblp},
pages = {129-138},
timestamp = {2024-04-08T13:14:52.000+0200},
title = {Testing framework for on-board verification of HLS modules using grey-box technique and FPGA overlays.},
url = {http://dblp.uni-trier.de/db/journals/integration/integration68.html#CabaRDBAL19},
volume = 68,
year = 2019
}